1. Field
Example embodiments relate to a semiconductor device and a method of fabricating the same, for example, a semiconductor device having a buried gate electrode and a method of fabricating the same.
2. Description of Related Art
As integration density of a semiconductor memory device, for example, a DRAM device, may become increased, an area occupied by a planar type MOS transistor may become gradually reduced. As a result, a length of a channel of the planar type MOS transistor may be reduced, so as to cause a short channel effect. For example, if the short channel effect occurs in a planar type access MOS transistor employed in a planar type memory cell of a DRAM device, a threshold voltage of the planar type access MOS transistor may be reduced and a leakage current may be increased, thereby deteriorating refresh characteristics of the memory cell in DRAM device.
A recess gate MOS transistor has been proposed that may increase the length of the channel relative to the planar type MOS transistor to suppress problems associated with the short channel effect, and which may increase the integration density of the DRAM device. The recess gate MOS transistor may include a recess formed in an active region of a semiconductor substrate, a gate electrode formed in the recess, and source/drain regions spaced apart by the recess and formed in the active region at both sides of the gate electrode.
However, although the recess gate MOS transistor may be employed in a DRAM device, there may be a limitation in increasing the integration density of the DRAM device due to difficulty in estimating relative locations of neighboring structures with respect to the recess gate MOS transistor in the memory cell of the DRAM cell. For example, neighboring structures may be a bit line, contacts adjacent to the recess gate MOS transistor, or a capacitor. At the present time, a recess gate MOS transistor may be formed on a smaller area in the memory cell so that sufficient space may remain in the memory cell to form neighboring structures, thereby protecting against an electrical short between the neighboring structures and the recess gate MOS transistor.